{"resolved":true,"match_type":"uuid","source_type":"original_book","book_id":"38270854-596f-4a26-8183-db8c968c6020","title":"编码 隐匿在计算机软硬件背后的语言","author":null,"edition":null,"publisher":null,"year":null,"isbn":"9787121181184","requested_by":"printed_page","book":{"source_type":"original_book","book_id":"38270854-596f-4a26-8183-db8c968c6020","id":"38270854-596f-4a26-8183-db8c968c6020","uuid":"38270854-596f-4a26-8183-db8c968c6020","title":"编码 隐匿在计算机软硬件背后的语言","normalized_title":"编码隐匿在计算机软硬件背后的语言","author":null,"edition":null,"publisher":null,"year":null,"isbn":"9787121181184","isbns":["9787121181184","0123456789","6044921875","3039331000","0000000000","0000000000000"],"parsed":true,"ai_readable":true,"document_type":"book","page_count":438,"navigation_url":"https://workshop.closeclaw.top/ai/book/38270854-596f-4a26-8183-db8c968c6020","title_url":"https://workshop.closeclaw.top/ai/title/%E7%BC%96%E7%A0%81%20%E9%9A%90%E5%8C%BF%E5%9C%A8%E8%AE%A1%E7%AE%97%E6%9C%BA%E8%BD%AF%E7%A1%AC%E4%BB%B6%E8%83%8C%E5%90%8E%E7%9A%84%E8%AF%AD%E8%A8%80","fixed_page_url_template":"https://workshop.closeclaw.top/ai/book/38270854-596f-4a26-8183-db8c968c6020/page/{printed_page}","path_api_url_template":"https://workshop.closeclaw.top/api/ai/book/38270854-596f-4a26-8183-db8c968c6020/page/{printed_page}","read_url":"https://workshop.closeclaw.top/api/ai/read/38270854-596f-4a26-8183-db8c968c6020","page_url":"https://workshop.closeclaw.top/api/ai/books/38270854-596f-4a26-8183-db8c968c6020/page","search_url":"https://workshop.closeclaw.top/api/ai/books/38270854-596f-4a26-8183-db8c968c6020/search"},"page":{"printed_page":332,"pdf_page":348,"physical_index":348,"physical_index_base":0,"printed_page_status":"recognized","page_sha256":"448ff27125cfcfcb12bbacf2d36d70a3f09c8f251a46979f742b5e5fdbe0b9f2"},"chapter":"编码隐匿在计算机软硬件背后的语言","content":"回想一下前面讲过的内容，异或（XOR）门电路在两个输入端中只有一个是高电平时，输出才为高电平；当两个输入端同时为低电平或高电平时，输出是低电平。\n\n例如，如果把 $\\mathbf { A } _ { 1 3 }$ 和 $\\mathbf { A } _ { 1 5 }$ 对应的开关闭合，就意味着让存储器板能响应存储器空间A000h\\~AFFFh。若总线上的地址信号 $\\mathbf { A } _ { 1 2 }$ $\\mathbf { A } _ { 1 3 }$ ${ \\bf A } _ { 1 4 }$ 和 $\\mathbf { A } _ { 1 5 }$ 与开关上设置的值相同的话，四个异或（XOR）门的输出都是0，或非（NOR）门的输出为1，如下图所示。\n\n接下来我们把Equal信号和一个2-4译码器联合起来使用，就能为四个存储体中的每一个都产生一个 $\\overrightarrow { \\mathbf { C } \\mathbf { S } }$ 信号，便于对存储体进行选择。具体连接图如下图所示。\n\n例如，若想选择第三个存储体，把 $\\mathbf { A } _ { 1 0 }$ 、 $\\mathsf { A } _ { 1 1 }$ 分别置0和1就可以了。\n\n现在回想一下在第16章中阐述过的如何组织RAM阵列，这一过程的细节是十分繁琐的，你可能会认为我们还需要8个4-1选择器，用来从4个存储体中选择正确的数据输出信号。但我们并没有这么做，下面来讨论下原因。\n\n通常情况下，TTL兼容集成电路的输出信号要么大于2.2V（逻辑1）要么小于0.4V(逻辑 $0 \\%$ 试想一下，如果把输出信号连接起来会发生什么呢？一个集成电路的输出为1，另一个集成电路的输出为0，若把这两个输出连接在一起，结果又是什么呢？恐怕谁也无法回答。就是由于这种不确定性，一般不会把集成电路的输出信号连接在一起。\n\n编码—隐匿在计算机软硬件背后的语言\n\n332","previous_page":331,"next_page":333}